"Sub-threshold VLSI logic family exploiting unbalanced pull-up/down ..."

Mingzhong Li et al. (2016)

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DOI: 10.1109/ASPDAC.2016.7427979

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins:
Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques. ASP-DAC 2016: 15-16

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