"40-nm 64-kbit Buffer/Backup SRAM with 330 nW Standby Power at 65°C ..."

Yoshisato Yokoyama et al. (2018)

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DOI: 10.1109/ASSCC.2018.8579327

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-07

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Yoshisato Yokoyama, Tomohiro Miura, Yukari Ouchi, Daisuke Nakamura, Jiro Ishikawa, Shunya Nagata, Makoto Yabuuchi, Yuichiro Ishii, Koji Nii:
40-nm 64-kbit Buffer/Backup SRAM with 330 nW Standby Power at 65°C Using 3.3 V IO MOSs for PMIC less MCU in IoT Applications. A-SSCC 2018: 9-12

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