"An Asynchronous RISC-V-based SNN Processor with Custom ISA Extensions for ..."

Xuanyu Zhang et al. (2025)

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DOI: 10.1109/ASYNC65240.2025.00009

access: closed

type: Conference or Workshop Paper

metadata version: 2025-06-23

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Xuanyu Zhang, Jilin Zhang, Haoyang Huang, Hong Chen:
An Asynchronous RISC-V-based SNN Processor with Custom ISA Extensions for Programmable On-Chip Learning. ASYNC 2025: 1-8

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