"Circuit Partitioning for Low Power BIST Design with Minimized Peak Power ..."

Patrick Girard et al. (1999)

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DOI: 10.1109/ATS.1999.810734

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch:
Circuit Partitioning for Low Power BIST Design with Minimized Peak Power Consumption. Asian Test Symposium 1999: 89-94

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