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"An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 ..."

Navin K. Mishra et al. (2011)

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DOI: 10.1109/CICC.2011.6055399

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Navin K. Mishra, Manish Jain, Phuong Le, Sanku Mukherjee, Arul Sendhil, Amir Amirkhany:
An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 compatible memory interface. CICC 2011: 1-4

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