"A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms ..."

Shiwei Zhang et al. (2023)

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DOI: 10.1109/CICC57935.2023.10121218

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type: Conference or Workshop Paper

metadata version: 2024-10-06

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Shiwei Zhang, Wei Deng, Haikun Jia, Hongzhuo Liu, Shiyan Sun, Pingda Guan, Baoyong Chi:
A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms Jitter and -83.9 dBc Reference Spur Level using a -130.8 dBc/Hz Phase Noise at 1MHz offset Folded Series-Resonance VCO in 65nm CMOS. CICC 2023: 1-2

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