Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Modelling Digital Circuits Problems with Set Constraints."

Francisco Azevedo, Pedro Barahona (2000)

> Home

Details and statistics

DOI: 10.1007/3-540-44957-4_28

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/cl/AzevedoB00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/cl/AzevedoB00
Francisco Azevedo, Pedro Barahona:
Modelling Digital Circuits Problems with Set Constraints. Computational Logic 2000: 414-428

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.