"An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs."

Tomoaki Sato et al. (2016)

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DOI: 10.1109/CTS.2016.0079

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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Tomoaki Sato, Sorawat Chivapreecha, Phichet Moungnoul, Kohji Higuchi:
An FPGA Architecture for ASIC-FPGA Co-design to Streamline Processing of IDSs. CTS 2016: 412-417

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