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"Layout-aware synthesis of arithmetic circuits."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Junhyung Um, Taewhan Kim (2002)

Dagstuhl

Trier

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DOI: 10.1145/513918.513971

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Junhyung Um, Taewhan Kim:
Layout-aware synthesis of arithmetic circuits. DAC 2002: 207-212

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last updated on 2018-11-06 16:58 CET by the dblp team

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