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"Hierarchical Random Simulation Approach for the Verification of S/390 CMOS ..."

Jörg A. Walter et al. (1997)

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DOI: 10.1145/266021.266041

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/dac/WalterLDLMKW97
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  - https://dblp.org/rec/conf/dac/WalterLDLMKW97
Jörg A. Walter, Jens Leenstra, Gerhard Döttling, Bernd Leppla, Hans-Jürgen Münster, Kevin W. Kark, Bruce Wile:
Hierarchical Random Simulation Approach for the Verification of S/390 CMOS Multiprocessors. DAC 1997: 89-94

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