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"A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 ..."

Mitsuo Ikeda et al. (1996)

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DOI: 10.1109/EDTC.1996.494320

access: closed

type: Conference or Workshop Paper

metadata version: 2022-05-20

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  dblp key:
  - conf/date/IkedaOAITK96
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  persistent URL:
  - https://dblp.org/rec/conf/date/IkedaOAITK96
Mitsuo Ikeda, Tsuneo Okubo, Tetsuya Abe, Yoshinori Ito, Yutaka Tashiro, Ryota Kasai:
A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set. ED&TC 1996: 320-327

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