"Full Transceiver Circuit Simulation using VHDL-AMS."

Jean Oudinot et al. (2002)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2002-10-30

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  dblp key:
  - conf/esm/OudinotSRLL02
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  persistent URL:
  - https://dblp.org/rec/conf/esm/OudinotSRLL02
Jean Oudinot, Serge Scotti, Jean Ravatin, Audrey Le-clercq, Jacky Lebrun:
Full Transceiver Circuit Simulation using VHDL-AMS. ESM 2002: 642-652

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