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"High-bit-rate low-power decision circuit using InP/InGaAs HBT technology ..."

Kiyoshi Ishii et al. (2004)

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DOI: 10.1109/ESSCIR.2004.1356691

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-29

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  - conf/esscirc/IshiiNIKHES04
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Kiyoshi Ishii, Hideyuki Nosaka, Minoru Ida, Kenji Kurishima, Michihiro Hirata, Takatorno Enoki, Tsugumichi Shibata:
High-bit-rate low-power decision circuit using InP/InGaAs HBT technology [master-slave D-type flip-flop]. ESSCIRC 2004: 355-358

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