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2020 – today
- 2022
[c11]Munehiko Nagatani, Hitoshi Wakita, Teruo Jyo, Tsutomu Takeya, Hiroshi Yamazaki, Yoshihiro Ogiso, Miwa Mutoh, Yuta Shiratori, Minoru Ida, Fukutaro Hamaoka, Masanori Nakamura, Takayuki Kobayashi, Hiroyuki Takahashi, Yutaka Miyamoto:
110-GHz-Bandwidth InP-HBT AMUX/ADEMUX Circuits for Beyond-1-Tb/s/ch Digital Coherent Optical Transceivers. CICC 2022: 1-8- 2020
- [j11]Munehiko Nagatani
, Hitoshi Wakita, Hiroshi Yamazaki, Yoshihiro Ogiso, Miwa Mutoh, Minoru Ida, Fukutaro Hamaoka, Masanori Nakamura, Takayuki Kobayashi, Yutaka Miyamoto, Hideyuki Nosaka:
A Beyond-1-Tb/s Coherent Optical Transmitter Front-End Based on 110-GHz-Bandwidth 2: 1 Analog Multiplexer in 250-nm InP DHBT. IEEE J. Solid State Circuits 55(9): 2301-2315 (2020) - [c10]Teruo Jyo, Munehiko Nagatani, Minoru Ida, Miwa Mutoh, Hitoshi Wakita, Naoki Terao, Hideyuki Nosaka:
An over 220-GHz-Bandwidth Distributed Active Power Combiner in 250-nm InP DHBT. BCICTS 2020: 1-4 - [c9]Nikolaos-Panteleimon Diamantopoulos, Hiroshi Yamazaki, Suguru Yamaoka, Munehiko Nagatani, Hidetaka Nishi, Hiromasa Tanobe, Ryo Nakao, Takuro Fujii, Koji Takeda, Takaaki Kakitsuka, Hitoshi Wakita, Minoru Ida, Hideyuki Nosaka, Fumio Koyama, Yutaka Miyamoto, Shinji Matsuo:
Net 321.24-Gb/s IMDD Transmission Based on a >100-GHz Bandwidth Directly-Modulated Laser. OFC 2020: 1-3
2010 – 2019
- 2019
- [j10]Takuya Hoshi, Norihide Kashio, Yuta Shiratori, Kenji Kurishima, Minoru Ida, Hideaki Matsuzaki:
InGaP/GaAsSb/InGaAsSb double heterojunction bipolar transistors with 703-GHz fmax and 5.4-V breakdown voltage. IEICE Electron. Express 16(3): 20181125 (2019) - [c8]Munehiko Nagatani, Yutaka Miyamoto, Hideyuki Nosaka, Hitoshi Wakita, Yoshihiro Ogiso, Hiroshi Yamazaki, Miwa Mutoh, Minoru Ida, Fukutaro Hamaoka, Masanori Nakamura, Takayuki Kobayashi:
A 110-GHz-Bandwidth 2: 1 AMUX-Driver using 250-nm InP DHBTs for Beyond-1-Tb/s/carrier Optical Transmission Systems. BCICTS 2019: 1-4 - [c7]Masanori Nakamura, Fukutaro Hamaoka, Munehiko Nagatani, Yoshihiro Ogiso, Hitoshi Wakita, Hiroshi Yamazaki, Takayuki Kobayashi, Minoru Ida, Hideyuki Nosaka, Yutaka Miyamoto:
192-Gbaud Signal Generation using Ultra-Broadband Optical Frontend Module Integrated with Bandwidth Multiplexing Function. OFC 2019: 1-3 - [c6]Yoshihiro Ogiso, Josuke Ozaki, Yuta Ueda, Hitoshi Wakita, Munehiko Nagatani, Hiroshi Yamazaki, Masanori Nakamura, Takayuki Kobayashi, Shigeru Kanazawa, Takuro Fujii, Yasuaki Hashizume, Hiromasa Tanobe, Nobuhiro Nunoya, Minoru Ida, Yutaka Miyamoto, Mitsuteru Ishikawa:
Ultra-High Bandwidth InP IQ Modulator for Beyond 100-GBd Transmission. OFC 2019: 1-3 - [c5]Hiroshi Yamazaki, Munehiko Nagatani, Hitoshi Wakita, Masanori Nakamura, Fukutaro Hamaoka, Takayuki Kobayashi, Yoshihiro Ogiso, Minoru Ida, Toshikazu Hashimoto, Hideyuki Nosaka, Yutaka Miyamoto:
Digital-Preprocessed Analog-Multiplexed DAC for High-Speed Optical Communications. OECC/PSC 2019: 1-3 - 2018
- [c4]Munehiko Nagatani, Hitoshi Wakita, Teruo Jyo, Miwa Mutoh, Minoru Ida, Sorin P. Voinigescu, Hideyuki Nosaka:
A 256-Gbps PAM-4 Signal Generator IC in 0.25-µm InP DHBT Technology. BCICTS 2018: 28-31 - [c3]Hiroshi Yamazaki, Munehiko Nagatani, Hitoshi Wakita, Yoshihiro Ogiso, Masanori Nakamura, Minoru Ida, Toshikazu Hashimoto, Hideyuki Nosaka, Yutaka Miyamoto:
Transmission of 400-Gbps Discrete Multi-Tone Signal Using >100-GHz-Bandwidth Analog Multiplexer and InP Mach-Zehnder Modulator. ECOC 2018: 1-3 - [c2]Yoshihiro Ogiso, Hitoshi Wakita, Munehiko Nagatani, Hiroshi Yamazaki, Masanori Nakamura, Takayuki Kobayashi, Johsuke Ozaki, Yuta Ueda, S. Nakano, Shigeru Kanazawa, Takuro Fujii, Yasuaki Hashizume, Hiromasa Tanobe, Nobuhiro Nunoya, Minoru Ida, Yutaka Miyamoto, Nobuhiro Kikuchi:
Ultra-High Bandwidth InP IQ Modulator co-assembled with Driver IC for Beyond 100-GBd CDM. OFC 2018: 1-3 - 2016
- [j9]Hiroyuki Fukuyama, Michihiro Hirata, Kenji Kurishima, Minoru Ida, Masami Tokumitsu, Shogo Yamanaka, Munehiko Nagatani, Toshihiro Itoh, Kimikazu Sano, Hideyuki Nosaka, Koichi Murata:
An InP-Based 27-GHz-Bandwidth Limiting TIA IC Designed to Suppress Undershoot and Ringing in Its Output Waveform. IEICE Trans. Electron. 99-C(3): 385-396 (2016) - [j8]Norihide Kashio, Takuya Hoshi, Kenji Kurishima, Minoru Ida, Hideaki Matsuzaki:
Type-II InGaAsSb-Base Double Heterojunction Bipolar Transistors Simultaneously Exhibiting over 600-GHz fmax and 5-V Breakdown Voltage. IEICE Trans. Electron. 99-C(5): 522-527 (2016) - 2012
- [j7]Yves Bouvier, Kimikazu Sano, Munehiko Nagatani, Koichi Murata, Kenji Kurishima, Minoru Ida:
A low-power wideband InP-HBT 27-1 PRBS generator. IEICE Electron. Express 9(19): 1504-1509 (2012) - [j6]Kenji Kurishima, Minoru Ida, Norihide Kashio, Yoshino K. Fukai:
Performance of InP/InGaAs HBTs with a Thin Highly N-Type Doped Layer in the Emitter-Base Heterojunction Vicinity. IEICE Trans. Electron. 95-C(8): 1310-1316 (2012)
2000 – 2009
- 2009
- [j5]Yoshino K. Fukai, Kenji Kurishima, Norihide Kashio, Minoru Ida, Shoji Yamahata, Takatomo Enoki:
Emitter-metal-related degradation in InP-based HBTs operating at high current density and its suppression by refractory metal. Microelectron. Reliab. 49(4): 357-364 (2009) - 2005
- [j4]Hideyuki Nosaka, Makoto Nakamura, Kimikazu Sano, Minoru Ida, Kenji Kurishima, Tsugumichi Shibata, Masami Tokumitsu, Masahiro Muraguchi:
A 24-Gsps 3-Bit Nyquist ADC Using InP HBTs for DSP-Based Electronic Dispersion Compensation. IEICE Trans. Electron. 88-C(6): 1225-1232 (2005) - [j3]Kiyoshi Ishii, Hideyuki Nosaka, Kimikazu Sano, Koichi Murata, Minoru Ida, Kenji Kurishima, Michihiro Hirata, Tsugumichi Shibata, Takatomo Enoki:
High-bit-rate low-power decision circuit using InP-InGaAs HBT technology. IEEE J. Solid State Circuits 40(7): 1583-1588 (2005) - 2004
- [j2]Hideyuki Nosaka, Eiichi Sano, Kiyoshi Ishii, Minoru Ida, Kenji Kurishima, Shoji Yamahata, Tsugumichi Shibata, Hiroyuki Fukuyama, Mikio Yoneyama, Takatomo Enoki, Masahiro Muraguchi:
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector. IEEE J. Solid State Circuits 39(8): 1361-1365 (2004) - [c1]Kiyoshi Ishii, Hideyuki Nosaka, Minoru Ida, Kenji Kurishima, Michihiro Hirata, Takatorno Enoki, Tsugumichi Shibata:
High-bit-rate low-power decision circuit using InP/InGaAs HBT technology [master-slave D-type flip-flop]. ESSCIRC 2004: 355-358 - 2002
- [j1]Kiyoshi Ishii, Hideyuki Nosaka, Hiroki Nakajima, Kenji Kurishima, Minoru Ida, Noriyuki Watanabe, Yasurou Yamane, Eiichi Sano, Takatomo Enoki:
Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors. IEEE J. Solid State Circuits 37(9): 1146-1151 (2002)
Coauthor Index
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