"Energy minimization for hybrid BIST in a system-on-chip test environment."

Raimund Ubar et al. (2005)

> Home

Details and statistics

DOI: 10.1109/ETS.2005.16

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/ets/UbarSJP05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ets/UbarSJP05
Raimund Ubar, Tatjana Shchenova, Gert Jervan, Zebo Peng:
Energy minimization for hybrid BIST in a system-on-chip test environment. ETS 2005: 2-7

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.