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"VHDL fault simulation for defect-oriented test and diagnosis of digital ICs."

João Paulo Teixeira et al. (1996)

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DOI: 10.1109/EURDAC.1996.558242

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/eurodac/TeixeiraCDFS96
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  persistent URL:
  - https://dblp.org/rec/conf/eurodac/TeixeiraCDFS96
João Paulo Teixeira, F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos:
VHDL fault simulation for defect-oriented test and diagnosis of digital ICs. EURO-DAC 1996: 450-455

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