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"A Formal Model of Clock Domain Crossing and Automated Verification of ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Julien Schmaltz (2007)

Dagstuhl

Trier

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DOI: 10.1109/FAMCAD.2007.22

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Julien Schmaltz:
A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware. FMCAD 2007: 223-230

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last updated on 2023-03-23 23:58 CET by the dblp team

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