


default search action
"An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic ..."
Wei Ting Loke, Chin Yang Koay (2017)
- Wei Ting Loke, Chin Yang Koay:
An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic Frequency Scaling Emulation (Abstract Only). FPGA 2017: 296

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.