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"A Fine-Grained Sparse Accelerator for Multi-Precision DNN."

Shulin Zeng et al. (2019)

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DOI: 10.1145/3289602.3293964

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-21

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  dblp key:
  - conf/fpga/ZengLLKXSHWY19
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  persistent URL:
  - https://dblp.org/rec/conf/fpga/ZengLLKXSHWY19
Shulin Zeng, Yujun Lin, Shuang Liang, Junlong Kang, Dongliang Xie, Yi Shan, Song Han, Yu Wang, Huazhong Yang:
A Fine-Grained Sparse Accelerator for Multi-Precision DNN. FPGA 2019: 185

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