"A Digital Root Based Modular Reduction Technique for Power Efficient, ..."

Richard Dorrance et al. (2020)

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DOI: 10.1109/FPL50879.2020.00063

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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Richard Dorrance, Andrey Belogolovy, Hechen Wang, Xue Zhang:
A Digital Root Based Modular Reduction Technique for Power Efficient, Fault Tolerance in FPGAs. FPL 2020: 341-346

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