"Power Modelling in Field Programmable Gate Arrays (FPGA)."

Andrés D. García, Wayne P. Burleson, Jean-Luc Danger (1999)

> Home

Details and statistics

DOI: 10.1007/978-3-540-48302-1_44

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpl/GarciaBD99
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpl/GarciaBD99
Andrés D. García, Wayne P. Burleson, Jean-Luc Danger:
Power Modelling in Field Programmable Gate Arrays (FPGA). FPL 1999: 396-404

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.