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ORCID"A technique for minimizing power during FPGA placement."
Kristofer Vorwerk et al. (2008)
- Kristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-Chung Hsu, Arun Kundu, Andrew A. Kennings:
A technique for minimizing power during FPGA placement. FPL 2008: 233-238
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