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"A Tool for Translation of VHDL Descriptions into a Formal Model and its ..."
Rajesh K. Bawa, Emmanuelle Encrenaz (1996)
- Rajesh K. Bawa, Emmanuelle Encrenaz:
A Tool for Translation of VHDL Descriptions into a Formal Model and its Application to Formal Verification and Synthesis. FTRTFT 1996: 471-474
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