"A memory mapping approach for network and controller optimization in ..."

Aroua Briki, Cyrille Chavet, Philippe Coussy (2013)

> Home

Details and statistics

DOI: 10.1145/2483028.2483122

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/BrikiCC13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/BrikiCC13
Aroua Briki, Cyrille Chavet, Philippe Coussy:
A memory mapping approach for network and controller optimization in parallel interleaver architectures. ACM Great Lakes Symposium on VLSI 2013: 321-322

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.