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"Algorithms and architecture of a VLSI signal processor for ANSI standard ..."

Taiho Koh et al. (1989)

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DOI: 10.1109/ICASSP.1989.266967

access: closed

type: Conference or Workshop Paper

metadata version: 2022-09-09

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  - conf/icassp/KohAHWCWLGDKCSW89
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  - https://dblp.org/rec/conf/icassp/KohAHWCWLGDKCSW89
Taiho Koh, Oscar E. Agazzi, S. S. Haider, R. W. Walden, Daniel R. Cassiday, Gene A. Wilson, T. Mariano Lalumia, Christine M. Gerveshi, M. R. Dwarakanath, Jitendra Kumar, Ronald E. Crochiere, R. F. Shaw, R. A. Wilson III, W. R. McDonald, N. L. Gottfried, N. S. Ramesh, M. L. Heisakanen, R. B. Blake Jr.:
Algorithms and architecture of a VLSI signal processor for ANSI standard ISDN transceiver. ICASSP 1989: 2468-2471

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