"Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate ..."

Chandan Kumar N. S et al. (2025)

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DOI: 10.1109/ICCD65941.2025.00013

access: closed

type: Conference or Workshop Paper

metadata version: 2026-01-15

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Chandan Kumar N. S, Bhavana S, Ajitesh Kumar Singh, Madhav Rao:
Hardware Efficient Multiplier Design Using an Optimal Mix of Approximate Booth Encodings. ICCD 2025: 41-48

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