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"An improved high speed fully pipelined 500 MHz 8×8 baugh wooley ..."

Abhijit R. Asati, Chandrashekhar (2008)

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DOI: 10.1109/ICIINFS.2008.4798406

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-27

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Abhijit R. Asati, Chandrashekhar:
An improved high speed fully pipelined 500 MHz 8×8 baugh wooley multiplier design using 0.6 μm CMOS TSPC logic design style. ICIIS 2008: 1-6

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