"Implementation of a Time-to-Digital Converter Inside FPGA."

Michal Spacek, Radek Sedlácek, Jaroslav Roztrocil (2023)

> Home

Details and statistics

DOI: 10.1109/IDAACS58523.2023.10348931

access: closed

type: Conference or Workshop Paper

metadata version: 2024-01-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/idaacs/SpacekSR23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/idaacs/SpacekSR23
Michal Spacek, Radek Sedlácek, Jaroslav Roztrocil:
Implementation of a Time-to-Digital Converter Inside FPGA. IDAACS 2023: 79-83

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.