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"Sensitivity to soft errors of NMOS and PMOS transistors evaluated by ..."

Kodai Yamada et al. (2018)

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DOI: 10.1109/IRPS.2018.8353691

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-22

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  dblp key:
  - conf/irps/YamadaMFK18
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Kodai Yamada, Haruki Maruoka, Jun Furuta, Kazutoshi Kobayashi:
Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI process. IRPS 2018: 3-1

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