"Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA."

Zouha Cherif et al. (2013)

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DOI: 10.1145/2487726.2487730

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/isca/CherifDLMB13
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Zouha Cherif, Jean-Luc Danger, Florent Lozach, Yves Mathieu, Lilian Bossuet:
Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. HASP@ISCA 2013: 4

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