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"Sub-picosecond-jitter clock generation for interleaved ADC with ..."

Jianping Gong, Sulin Li, John A. McNeill (2016)

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DOI: 10.1109/ISCAS.2016.7539165

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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Jianping Gong, Sulin Li, John A. McNeill:
Sub-picosecond-jitter clock generation for interleaved ADC with Delay-Locked-Loop in 28nm CMOS. ISCAS 2016: 2763-2766

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