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"1.25/2.5-Gb/s burst-mode clock recovery circuit with a novel dual bit-rate ..."
Pyung-Su Han, Woo-Young Choi (2006)
- Pyung-Su Han, Woo-Young Choi:
1.25/2.5-Gb/s burst-mode clock recovery circuit with a novel dual bit-rate structure in 0.18µm CMOS. ISCAS 2006
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