"A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM ..."

Bo-Ting Wang, James B. Kuo (2000)

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DOI: 10.1109/ISCAS.2000.857606

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-23

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Bo-Ting Wang, James B. Kuo:
A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability. ISCAS 2000: 733-736

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