"A Low-Power 12-bit 2GS/s Time-Interleaved Pipelined-SAR ADC in 28nm CMOS ..."

Xiao Wang et al. (2018)

Details and statistics

DOI: 10.1109/ISCAS.2018.8351064

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-27

a service of  Schloss Dagstuhl - Leibniz Center for Informatics