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"0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less ..."

Volker Dudek et al. (1998)

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DOI: 10.1145/280756.280810

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/islped/DudekGHS98
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Volker Dudek, Reinhard Grube, Bernd Höfflinger, Michael Schau:
0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology. ISLPED 1998: 103-105

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