"MVL circuit design and characterization at the transistor level using SUS-LOC."

E. Kinvi-Boh et al. (2003)

Details and statistics

DOI: 10.1109/ISMVL.2003.1201392

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

a service of  Schloss Dagstuhl - Leibniz Center for Informatics