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"A 5GHz All-Digital PLL with shunt regulating Ring DCO in BOST for DDR5 ATE."
Kyungmin Baek, Kahyun Kim, Deog-Kyoon Jeong (2022)
- Kyungmin Baek, Kahyun Kim, Deog-Kyoon Jeong:
A 5GHz All-Digital PLL with shunt regulating Ring DCO in BOST for DDR5 ATE. ISOCC 2022: 139-140
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