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"Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs."

Masaki Sano et al. (2021)

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DOI: 10.1109/ISOCC53507.2021.9613872

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-06

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  dblp key:
  - conf/isocc/SanoSNKTYU21
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  - https://dblp.org/rec/conf/isocc/SanoSNKTYU21
Masaki Sano, Kenta Shirane, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Tongxin Yang, Tomoaki Ukezono:
Design of a 32-bit Accuracy-Controllable Approximate Multiplier for FPGAs. ISOCC 2021: 55-56

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