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"Analysis and design considerations of static CMOS logics under process, ..."

Wei-Bin Yang et al. (2015)

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DOI: 10.1109/ISPACS.2015.7432737

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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  - conf/ispacs/YangLWCCL15
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Wei-Bin Yang, Yu-Yao Lin, Chi-Hsiung Wang, Kuo-Ning Chang, Cing-Huan Chen, Yu-Lung Lo:
Analysis and design considerations of static CMOS logics under process, voltage and temperature variation in UMC 0.18µm CMOS process. ISPACS 2015: 57-61

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