"A low-hardware consumption FPGA based configurable LDPC decoder."

Lijun Zhang, Ying Jiang (2013)

> Home

Details and statistics

DOI: 10.1109/ISPACS.2013.6704550

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ispacs/ZhangJ13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ispacs/ZhangJ13
Lijun Zhang, Ying Jiang:
A low-hardware consumption FPGA based configurable LDPC decoder. ISPACS 2013: 221-224

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.