"Interconnect and Thermal-aware Floorplanning for 3D Microprocessors."

Wei-Lun Hung et al. (2006)

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DOI: 10.1109/ISQED.2006.77

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/isqed/HungLXVI06
Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin:
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104

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