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"Using a hierarchical DfT methodology in high frequency processor designs ..."
Michael Kessler et al. (2001)
- Michael Kessler, Gundolf Kiefer, Jens Leenstra, Knut Schünemann, Thomas Schwarz, Hans-Joachim Wunderlich:
Using a hierarchical DfT methodology in high frequency processor designs for improved delay fault testability. ITC 2001: 461-469
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