"Bayesian model fusion: Enabling test cost reduction of analog/RF circuits ..."

Shanghang Zhang et al. (2014)

> Home

Details and statistics

DOI: 10.1109/TEST.2014.7035328

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/itc/ZhangLBSCB14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/itc/ZhangLBSCB14
Shanghang Zhang, Xin Li, Ronald D. Blanton, José Machado da Silva, John M. Carulli Jr., Kenneth M. Butler:
Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling. ITC 2014: 1-10

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.