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"Practical experience designing and debugging an FPGA for a real-time ..."

Matheus Berger Oliveira et al. (2017)

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DOI: 10.1109/LATW.2017.7906765

access: closed

type: Conference or Workshop Paper

metadata version: 2023-07-25

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  dblp key:
  - conf/latw/OliveiraMCWN17
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Matheus Berger Oliveira, Joao de Moraes, Sérgio Luis Cechin, Taisy Silva Weber, Joao Netto:
Practical experience designing and debugging an FPGA for a real-time ethernet industrial bus. LATS 2017: 1-6

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