Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks."

Vasileios Kitsakis et al. (2019)

> Home

Details and statistics

DOI: 10.1007/978-3-030-38085-4_46

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ondm/KitsakisKSGALAS19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ondm/KitsakisKSGALAS19
Vasileios Kitsakis, Konstantina Kanta, Ioannis Stratakos, Giannis Giannoulis, Dimitrios Apostolopoulos, George Lentaris, Hercules Avramopoulos, Dimitrios Soudris, Dionysios I. Reisis:
Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks. ONDM 2019: 540-551

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.