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"A Novel Speedup Evaluation for Multicore Architecture Based Topology of ..."

Xiaojun Wang, Feng Shi, Hong Zhang (2019)

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DOI: 10.1007/978-981-15-2767-8_4

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-20

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  dblp key:
  - conf/paap/0005SZ19
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Xiaojun Wang, Feng Shi, Hong Zhang:
A Novel Speedup Evaluation for Multicore Architecture Based Topology of On-Chip Memory. PAAP 2019: 35-47

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