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"An a-FPGA architecture for relative timing based asynchronous designs."

Jotham Vaddaboina Manoranjan, Kenneth S. Stevens (2014)

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DOI: 10.1109/RECONFIG.2014.7032497

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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  dblp key:
  - conf/reconfig/ManoranjanS14
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  - https://dblp.org/rec/conf/reconfig/ManoranjanS14
Jotham Vaddaboina Manoranjan, Kenneth S. Stevens:
An a-FPGA architecture for relative timing based asynchronous designs. ReConFig 2014: 1-6

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