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ORCID"Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic ..."
Scott Young et al. (2019)
- Scott Young, Alexandrea Demmings, Nasrin Eshraghi Ivari, Jean-Philippe Legault, Kenneth B. Kent
:
Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II. RSP 2019: 71-74
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