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"Optimization of the Binary Adder Architectures Implemented in ASICs and FPGAs."

Bojan Jovanovic, Milun Jevtic (2012)

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DOI: 10.1007/978-3-642-33941-7_27

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/sofa/JovanovicJ12
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Bojan Jovanovic, Milun Jevtic:
Optimization of the Binary Adder Architectures Implemented in ASICs and FPGAs. SOFA 2012: 295-308

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