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"An Efficient Timing and Clock Tree Aware Placement Flow with Multibit ..."

Jasmine Kaur Gulati, Bhanu Prakash, Sumit Jagdish Darak (2017)

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DOI: 10.1007/978-981-10-7470-7_56

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-25

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  dblp key:
  - conf/vdat/GulatiPD17
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  - https://dblp.org/rec/conf/vdat/GulatiPD17
Jasmine Kaur Gulati, Bhanu Prakash, Sumit Jagdish Darak:
An Efficient Timing and Clock Tree Aware Placement Flow with Multibit Flip-Flops for Power Reduction. VDAT 2017: 581-593

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